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rt9728c ? ds9728c-00 october 2015 www.richtek.com 1 ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ordering information note : richtek products are : ? rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ? suitable for use in snpb or pb-free soldering processes. features ? ? ? ? ? 10% current limit accuracy @ 1.3a ? ? ? ? ? adjustable current limit : 75ma to 1.3a (typ.) ? ? ? ? ? meets usb current limiting requirements ? ? ? ? ? operating voltage range : 2.5v to 5.5v ? ? ? ? ? reverse input ? ? ? ? ? output voltage protection ? ? ? ? ? built-in soft-start ? ? ? ? ? 120m high-side mosfet ? ? ? ? ? 120 a supply current ? ? ? ? ? rohs compliant and halogen free 120m , 1.3a power switch with programmable current limit general description the rt9728c is a cost effective, low voltage, single p-mosfet high-side power switch ic for usb application with a programmable current limit feature. low switch-on resistance (typ.120m ) and low supply current (typ. 120 a) are realized in this ic.the rt9728c can offer a programmable current limit threshold between 75ma and 1.3a (typ.) via an external resistor. the 10% current limit accuracy can be realized for all current limit settings. in addition, a flag output is available to indicate fault conditions to the local usb controller. furthermore, the chip also integrates an embedded delay function to prevent mis-operation from happening due to high inrush current. the rt9728c is an ideal solution for usb power supply and can support flexible applications since it is functional for various current limit requirements. it is available in sot-23-6 and wdfn-6l 2x2 packages. pin configurations (top view) sot-23-6 applications ? usb bus/self powered hubs ? usb peripheral ports ? acpi power distribution ? battery power equipment ? 3g/3.5g data card, set-top boxes wdfn-6l 2x2 rt9728c package type e : sot-23-6 qw : wdfn-6l 2x2 h : chip enable high lead plating system g : green (halogen free and pb free) vout ilim vin gnd 5 4 1 2 3 6 gnd 7 en fault vout ilim vin gnd 4 23 5 6 fault en
rt9728c 2 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin no. pin name pin function sot-23-6 wdfn-6l 2x2 1 6 vin input voltage. 2 5, 7 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 3 4 en chip enable. 4 3 fault active-low open-drain output. asserted during over current, over temperature, or reverse-voltage conditions. 5 2 ilim current limit set pin. external resistor used to set current limit threshold. recommend 19.1k ? ? r ilim ? 232k ? . 6 1 vout power switch output. functional pin description typical application circuit marking information 42= : product code dnn : date code RT9728CHGE 3w : product code w : date code rt9728chgqw 42=dnn 3ww vin rt9728c v in ilim r ilim vout 150f fault en r fault c in v out gnd fault signal 100k 10f chip enable
rt9728c 3 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram P 60 ? uvlo current limit 7.5ms deglitch 4ms deglitch thermal sense drive reverse voltage comparator switch well current sense + - vout ilim gnd en vin fault operation the rt9728c are current-limited, power-distribution switches using p-channel mosfets for applications where short circuits or heavy capacitive loads will be encountered. these devices allow the user to program the current-limit threshold between 75ma and 1.3a (typ) via an external resistor. additional device shutdown features include over temperature protection and reverse-voltage protection. the driver controls the gate voltage of the power switch. the driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built-in soft-start functionality. the rt9728c enters the constant-current mode when the load exceeds the current-limit threshold.
rt9728c 4 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics (v in = 3.6v, 19.1k r ilim 232k , t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max unit en input voltage logic-high v ih 1.1 -- -- v logic- low v il -- -- 0.66 current limit threshold resistor range r ilim (nominal 1%) from i lim to gnd 19.1 -- 232 k ? under voltage lockout threshold v uvlo v in rising -- 2.3 -- v v in falling -- 2.1 -- shutdown current i shdn v in = 5.5v, no load on v out , v en = 0v -- 1 3 ? a quiescent current i q v in = 5.5v, no load on v out r ilim = 20k ? -- 120 170 ? a r ilim = 210k ? -- 120 170 reverse leakage current i rev v out = 5.5v, v in = 0v -- 1 3 ? a thermal shutdown temperature t sd -- 160 -- c static drain-source on-state resistance r ds(on) i sw = 0.2a -- 120 -- m ? current limit i lim r ilim = 20k ? 1190 1295 1400 ma r ilim = 49.9k ? 468 520 572 r ilim = 210k ? 110 130 150 ilim shorted to vin 50 75 100 absolute maximum ratings (note 1) ? supply input voltage ------------------------------------------------------------------------------------------------------ ? 0.3v to 6v ? other pin v oltage --------------------------------------------------------------------------------------------------------- ? 0.3v to 6v ? power dissipation, p d @ t a = 25 c sot-23-6 -------------------------------------------------------------------------------------------------------------------- 0.4w wdfn-6l 2x2 -------------------------------------------------------------------------------------------------------------- 0.606w ? package thermal resistance (note 2) sot-23-6, ja --------------------------------------------------------------------------------------------------------------- 250 c/w wdfn-6l 2x2, ja --------------------------------------------------------------------------------------------------------- 165 c/w wdfn-6l 2x2, jc -------------------------------------------------------------------------------------------------------- 7 c/w ? lead temperature (soldering, 10 se c.) ------------------------------------------------------------------------------- 260 c ? junction temperature ----------------------------------------------------------------------------------------------------- 150 c ? storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c ? esd susceptibility (note 3) hbm (human body model) ---------------------------------------------------------------------------------------------- 2kv recommended operating conditions (note 4) ? supply input voltage, vin ----------------------------------------------------------------------------------------------- 2.5v to 5.5v ? junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c ? ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c
rt9728c 5 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. parameter symbol test conditions min typ max unit reverse voltage comparator trip point (v out ?? v in ) -- 135 -- mv fault output low voltage v ol i fault = 1ma -- 180 -- mv fault off state leakage v fault = 5.5v -- 1 -- ? a fault deglitch fault assertion or de-assertion due to over current condition 5 7.5 10 ms fault assertion or de-assertion due to reverse voltage condition 2 4 6 note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a low effective thermal conductivity single-layer test board per jedec 51-3. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
rt9728c 6 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics supply current vs. temperature 80 90 100 110 120 130 140 150 -50 -25 0 25 50 75 100 125 temperature (c) supply current ( a ) fault deglitch timing vs. temperature 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 temperature (c) fault deglitch timing (ms ) under voltage lockout vs. temperature 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 -50 -25 0 25 50 75 100 125 temperature (c) under voltage lockout (v ) rising falling on- resistance vs. temperature 60 70 80 90 100 110 120 130 140 150 -50-25 0 255075100125 temperature (c) on-resistance (m ) v in = 3.6v v in = 5v current limit vs. temperature 1.1 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) r ilim = 20k en threshold voltage vs. temperature 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 temperature (c) en threshold voltage (v) 1 rising falling
rt9728c 7 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. current limit time (2.5ms/div) short circuit to full load (5 ) v out (2v/div) fault (5v/div) i in (1a/div) v in = 5v, c out = 150 f, r ilim = 20k v out (2v/div) fault (5v/div) i in (1a/div) current limit time (2.5ms/div) v in = 5v, c out = 150 f, r ilim = 20k full load (5 ) to short circuit current limit time (2.5ms/div) no load to short circuit v out (2v/div) fault (5v/div) i in (1a/div) v in = 5v, c out = 150 f, r ilim = 20k current limit short circuit to no load v out (2v/div) fault (5v/div) i in (1a/div) v in = 5v, c out = 150 f, r ilim = 20k time (2.5ms/div) power off from en time (500 s/div) v out (5v/div) v en (10v/div) i in (1a/div) rt9728c, v in = 5v, c out = 150 f, r ilim = 20k , r out = 5 power on from en time (500 s/div) v out (5v/div) v en (10v/div) i in (1a/div) rt9728c, v in = 5v, c out = 150 f, r ilim = 20k , r out = 5
rt9728c 8 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. static drain-source current vs. v in - v out 0 20 40 60 80 100 120 140 160 0 200 400 600 800 1000 v in - v out (mv) static drain-source current (ma) 1 v in = 5.5v, r ilim = 200k static drain-source current vs. v in - v out 0 200 400 600 800 1000 1200 1400 1600 0 200 400 600 800 1000 v in - v out (mv) static drain-source current (ma) 1 v in = 5.5v, r ilim = 20k
rt9728c 9 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications information the rt9728c is a single p-mosfet high-side power switch with active-high/low enable input, optimized for self- powered and bus-powered universal serial bus (usb) applications. the switch's low r ds(on) meets usb voltage drop requirements and a flag output is available to indicate fault conditions to the local usb controller. current limiting and short circuit protection when a heavy load or short circuit situation occurs while the switch is enabled, large transient current may flow through the device. the rt9728c includes a current-limit circuitry to prevent these large currents from damaging the mosfet switch and the hub downstream ports. the rt9728c provides an adjustable current limit threshold between 120ma and 1.3a (typ) via an external resistor, r ilim , between 19.1k and 232k . however, if the ilim pin is connected to v in , the current limit threshold will be 75ma (typ). once the current limit threshold is exceeded, figure 1. current limit threshold vs r ilim current limit threshold vs. r ilim 0 200 400 600 800 1000 1200 1400 1600 20 50 80 110 140 170 200 230 r ilim (k ) current limit threshold (ma ) the device enters constant-current mode until either thermal shutdown occurs or the fault is removed. the table1 shows a recommended current limit value vs. r ilim resistor. table 1. recommended r ilim resistor selections desired nominal current limit (ma) ideal resistor (k ? ) closet 1% resistor (k ? ) actual limits (include r tolerance) ios min (ma) ios nom (ma) ios max (ma) 75 short ilim to vin 50.0 75.0 100.0 120 226.1 226.0 101.3 120.0 142.1 200 134.0 133.0 173.7 201.5 233.9 300 88.5 88.7 262.1 299.4 342.3 400 65.9 66.5 351.1 396.7 448.7 500 52.5 52.3 443.9 501.6 562.4 600 43.5 43.2 535.1 604.6 674.1 700 37.2 37.4 616.0 696.0 776.0 800 32.4 32.4 708.7 800.8 892.9 900 28.7 28.7 797.8 901.5 1005.2 1000 25.8 26.1 875.4 989.1 1102.8 1100 23.4 23.2 982.1 1109.7 1237.3 1200 21.4 21.5 1057.9 1195.4 1332.9 1300 19.7 19.6 1178.0 1308.5 1439.0
rt9728c 10 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. chip enable input the rt9728c will be disabl ed when the en pin is in a logic-low/high condition. during this condition, the internal circuitry and mosfet are turned off, reducing the supply current to 1 a typical. the maximum guaranteed voltage for a logic-low at the en pin is 0.66v. a minimum guaranteed voltage of 1.1v at the en pin will turn off the rt9728c. floating the input may cause unpredictable operation. en should not be allowed to go negative with respect to gnd. under voltage lockout under voltage lockout (uvlo) prevents the mosfet switch from turning on until input voltage exceeds approximately 2.3v. if input voltage drops below approximately 2.1v, uvlo turns off the mosfet switch and fault will be asserted accordingly. the under voltage lockout detection functions only when the switch is enabled. fault flag the rt9728c provides a fault signal pin which is an n- channel open drain mosfet output. this open drain output goes low when current exceeds current limit threshold, v out ? v in exceeds reverse voltage trip level, or the die temperature exceeds 160 c approximately. the fault output is capable of sinking a 1ma load to typically 180mv above ground. the fault pin requires a pull-up resistor; this resistor should be large in value to reduce energy drain. a 100k pull-up resistor works well for most applications. in case of an over current condition, fault will be asserted only after the flag response delay time, td, has elapsed. this ensures that fault is asserted upon valid over current conditions and that erroneous error reporting is eliminated. for example, false over current conditions may occur during hot-plug events when extremely large capacitive loads are connected, which induces a high transient inrush current that exceeds the current limit threshold. the fault response delay time, t d , is typically 7.5ms. supply filter/bypass capacitor a 10 f low esr ceramic capacitor connected from v in to gnd and located close to the device is strongly recommended to prevent input voltage drooping during hot- plug events. however, higher capacitor values may be used to further reduce the voltage droop on the input. without this bypass capacitor, an output short may cause sufficient ringing on the input (from source lead inductance) to destroy the internal control circuitry. note that the input transient voltage must never exceed 6v as stated in the absolute maximum ratings. output filter capacitor a low esr 150 f aluminum electrolytic capacitor connected between v out and gnd is strongly recommended to meet the usb standard maximum droop requirement for the hub, vbus. standard bypass methods should be used to minimize inductance and resistance between the bypass capacitor and the downstream connector to reduce emi and decouple voltage droop caused by hot-insertion transients in downstream cables. ferrite beads in series with vbus, the ground line and the 0.1 f bypass capacitors at the power connector pins are recommended for emi and esd protection. the bypass capacitor itself should have a low dissipation factor to allow decoupling at higher frequencies. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for sot-23-6 packages, the thermal resistance, ja , is 250 c/ w on a standard jedec 51-3 single-layer thermal test board. for wdfn-6l 2x2 packages, the thermal resistance, ja , is 165 c/w on a standard jedec 51-3
rt9728c 11 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 2. derating curve of maximum power dissipation 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 wdfn-6l 2x2 sot-23-6 single-layer pcb single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (250 c/w) = 0.4w for sot-23-6 package p d(max) = (125 c ? 25 c) / (165 c/w) = 0.606w for wdfn-6l 2x2 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curves in figure 2 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation.
rt9728c 12 ds9728c-00 october 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension a a1 e b b d c h l sot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.031 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
rt9728c 13 ds9728c-00 october 2015 www.richtek.com richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 d 1.950 2.050 0.077 0.081 d2 1.000 1.450 0.039 0.057 e 1.950 2.050 0.077 0.081 e2 0.500 0.850 0.020 0.033 e 0.650 0.026 l 0.300 0.400 0.012 0.016 w-type 6l dfn 2x2 package d 1 e a3 a a1 e b l d2 e2 see detail a 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options

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